1. Technical Field
The present invention relates to a method for fabricating conductive lines, and more particularly, to a method for fabricating conductive metal lines of a semiconductor device.
2. Related Art
As sizes of semiconductor devices constantly are reduced, successful formation of I-shaped conductive line patterning using conventional etching techniques becomes increasingly more difficult. Accordingly, use of bottom barriers, such as a Ti/TiN layer, are sometimes unnecessary. However, by foregoing the use of the bottom barriers, it is easy to induce hillock formation.
Conventionally, conductive lines can be formed using a BPSG film and a conductive layer that includes Al/Ti/TiN, or Al/TiN and a hard mask (HM) oxide. Alternatively, conductive lines may commonly be formed using a high density plasma (HDP) with post annealing before patterning. However, due to stress mismatch between the individual layers, hillocks and bumps are easily formed.
FIGS. 1A and 1B are cross-sectional views of a conventional method for fabricating semiconductor devices. In FIG. 1A, a device 10a includes formation of conductive lines 12a on a substrate 14a without the use of a deposited film. As a result, the conductive lines 12a are formed having hillocks 16. In FIG. 1B, a device 10b includes formation of conductive lines 12b on a substrate 14b with the use of a deposited film 18. As a result, use of the deposited film 18 results in formation of the conductive lines 12b having hillocks 16 and bumps 20 due to the stress mis-match between the deposited film 18 and the material(s) used to form the conductive lines 12b. Accordingly, an improved method is required to successfully form conductive lines without introducing hillock or bump formations.